(a) Field of the Invention
The present invention relates to a reference current generator for a resistance type memory and a method thereof, and more particularly to a generator capable of generating an accurate and reliable reference current and a method thereof.
(b) Description of the Prior Art
Currently, a typical memory is comprised of a plurality of memory cells. Each memory cell is utilized to store 1-bit data, and the data state may be written to or read out from the cell. Different resistance values of the memory cell correspond to different logic states of the stored data. In a non-volatile memory, it is necessary to provide a current source or a voltage source to a selected memory cell during reading of data from the memory. The logic states of data stored in the memory cell is determined by the output sense current. However, due to the non-uniformity of semiconductor manufacturing process, the characteristics of memory cells in memory are different from each other so that their resistance values are changed and the sense current values are also shifted, which leads to incorrect interpretation. Therefore, the logic states of data stored in a memory cell are often determined by the comparison of the sense currents with reference currents generated by a reference current generator.
Referring to FIG. 1, a schematic view showing sense current distributions of two logic states of a stored datum is illustrated. In this figure, the abscissa represents the magnitude of the sense current and the ordinate represents the number of memory cells corresponding to the sense currents correspond. Generally, the distribution of memory cells is a Gaussian distribution as shown in the figure. When the resistance value of a memory cell is Rmax, the logic state of the corresponding data is 0 and the sense current is I0. When the resistance value of a memory cell is Rmin, the logic state of the corresponding data is 1 and the sense current is I1. Iref represents a reference current. When the resistance value of a memory cell varies, the corresponding sense current also varies within a certain range. Therefore, it is necessary to determine the logic state of read data by the comparison of the sense current with a reference current. When the sense current is less than Iref, the resistance value of the memory cell is around Rmax. As a result, the logic state is determined as 0. When the sense current is greater than Iref, the resistance value of the memory cell is around Rmin As a result, the logic state is determined as 1.
Referring to both FIGS. 2A and 2B, there are illustrated a graphical representation illustrating the relationship of various resistances discussed and a schematic view showing a midpoint resistance generator according to the prior art of U.S. Pat. No. 6,392,923. In a memory cell, an element with a maximum resistance value (Rmax) is connected in series with an element with a minimum resistance value (Rmin) to form a series circuit. Then, two series circuits are connected in parallel to obtain an equivalent midpoint resistance (Rmid) with a resistance value of (Rmax+Rmin)/2. The current passing through the generator is not a midpoint current. Thus it is unsuitable for the operation for utilizing the output current value as a reference for determining the logic state, but is only suitable for the operation for utilizing the output voltage value as a reference for determining the logic state.
In another prior art patent, U.S. Pat. No. 7,286,395 discloses two memory cells with different resistance characteristics (Rmax, Rmin) are connected in parallel to obtain an equivalent resistance Rmax//Rmin The generator becomes a midpoint current generator by averaging the output currents passing through the generator. However, the generator has a poor resistance capability against resistance variations caused by semiconductor manufacturing process.